Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2006-03-07
2006-03-07
Du, Thuan (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S500000, C713S502000
Reexamination Certificate
active
07010712
ABSTRACT:
A method synchronizes serial data stream output from a multiple-port system. The multiple-port system includes a plurality of port devices. The method includes (a) timing a serial data stream at each port device, the serial data stream including a series of data frames, (b) generating a framing signal at each port device, the framing signal indicating a boundary of the data frame in the serial data stream, (c) supplying the framing signal to a next port device, and (d) synchronizing, at each next port, the timing of the serial data stream in response to the supplied framing signal.
REFERENCES:
patent: 5006979 (1991-04-01), Yoshie et al.
patent: 6188286 (2001-02-01), Hogl et al.
“Etherent PHY-110 Core”, DB08-000181-00 Mar. 2002, pp. 1-17.
Huang Shih-Hsing
Raman Narayanan
Du Thuan
LSI Logic Corporation
Thelen Reid & Priest LLP
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