Method and system for selectively varying signal delay in...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay

Reexamination Certificate

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Details

C713S503000

Reexamination Certificate

active

06438703

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates in general to electronic systems and, in particular, to communication of electrical signals in electronic systems. Still more particularly, the present invention relates to a method and system for selectively varying the signal delay applied to an electrical signal communicated between two electrical devices in response to detecting a selected data sequence, such as quiescence of the electrical signal.
2. Description of the Prior Art
When transmitting data via a transmission line such as a bus signal line, more energy is required to change the state of the bus signal line if the bus signal line has remained in a steady state for a long period of time than if the state of the bus signal line has transitioned recently. This phenomenon, which is due to the capacitance of the bus signal line, is often referred to as line charging effect. For data buses that require alignment of data transitions with bus clock transitions, the line charging effect may cause the data signal line to transition later in time than the clock signal line. As a result, a data receiver connected to the bus will observe a reduced setup time for the data signal.
At slower data transfer rates, the line charging effect can be accommodated in the skew timing budget. However, at faster data transfer rates having concomitantly smaller skew timing budgets, the line charging effect may cause the data signal to fail the setup time of the data receiver, thus inducing data errors. The present invention therefore recognizes that it would be useful and desirable to provide a method and system for reducing the line charging effect of data signal lines in order to support faster data transfer rates.
In prior art magnetic storage systems, such as magnetic disk and tape drives, it has been known that high storage densities can cause magnetic interference between adjacent data during read operations. This interference, which is sometimes referred to as inter-symbol interference (ISI), can reduce the sensed magnitude of data and shift the apparent position of data peaks, thereby inducing errors when reading data. To minimize the influence of ISI, and in particular to reduce peak shift, various techniques have been employed, including pulse-slimming and precompensation. Precompensation entails shifting the write signal that encodes the data in the magnetic medium in the opposite direction than the signal is shifted by ISI when read. As a result, the peak shift observed during read operations can be reduced or eliminated. The present invention includes a recognition that a different form of precompensation can also advantageously be utilized to reduce or eliminate errors in data transmission arising from the line charging effect.
SUMMARY OF THE INVENTION
According to the present invention, an electrical system includes a first device and a second device coupled by at least one signal line. An electrical signal is communicated between the first device and the second device during a plurality of active clock active periods, where the electrical signal is in one of multiple possible states during each of the active clock periods. Timing circuitry within one of the first and second devices detects a predetermined sequence of states in the electrical signal, and in response to detecting the predetermined sequence, adjusts the timing of a subsequent state of the electrical signal with respect to an associated active clock period. Adjustment of signal timing in this manner is useful in reducing signal error due to the line charging effect.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.


REFERENCES:
patent: 3641506 (1972-02-01), Cupp et al.
patent: 5493454 (1996-02-01), Ziperovich et al.
patent: 5778214 (1998-07-01), Taya et al.
patent: 6260154 (2001-07-01), Jeddeloh

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