Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate
2005-11-29
2005-11-29
Butler, Dennis M. (Department: 2115)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Using delay
C713S503000
Reexamination Certificate
active
06971040
ABSTRACT:
A delay element is coupled to a first interface, which is coupled to a second interface via interconnect. Traces in the interconnect for propagating output signals from the first interface to the second interface have varying lengths. In order to reduce undesirable effects resulting from simultaneously switching the output signals, the delay element programmably and selectably delays the output signals according to the lengths of the traces they respectively travel to the second interface. Additionally, the effect of varying lengths of interconnect on receiver timings can be accommodated by using the delay element to programmably and selectably sample data at a receiver interface.
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Butler Dennis M.
Intel Corporation
Kenyon & Kenyon
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