Method and system for providing reduced-sized contacts in a...

Details Method and system for providing reduced-sized contacts in a... Method and system for providing reduced-sized contacts in a...

1999-09-23

2002-01-29

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S213000, C438S270000, C438S210000, C257S308000

Reexamination Certificate

active

06342415

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to semiconductor devices, more particularly to a method and system for reducing charge gain and charge loss due to contacts in semiconductor devices, such as a flash memory device.
BACKGROUND OF THE INVENTION
A conventional semiconductor device, such as a memory, includes a large number of cells, which are typically floating gate devices such as floating gate transistors. For example,
FIG. 1
depicts a portion of a conventional semiconductor device
10
. The semiconductor device
10
includes cells
20
,
30
, and
40
formed on a substrate
11
. Each cell includes a gate stack
21
,
31
and
41
. Each gate stack
21
,
31
and
41
includes a floating gate
22
,
32
and
42
, respectively, and a control gate
24
,
34
and
44
, respectively. The cells
20
,
30
and
40
also include drains
29
and
39
and sources
19
and
49
. As depicted in
FIG. 1
, the cells
20
and
40
share a common drain
29
, while the cells
20
and
30
share a common source
19
. Typically, each cell
20
,
30
and
40
also includes spacers
26
and
28
,
36
and
38
, and
46
and
48
, respectively.
In order to make electrical contact to one or more of the cells
20
,
30
and
40
, a conventional electrical contact
52
is provided. The conventional contact
52
is provided within a conventional contact hole
50
. The conventional contact hole
50
is provided in an insulating layer
54
which otherwise covers the cells
20
,
30
and
40
. The insulating layer
54
insulates the cells
20
,
30
and
40
. The conventional contact hole
50
is filled with a conductive material to form the conventional contact
52
.
Although the conventional semiconductor device
10
functions, one of ordinary skill in the art will readily realize that the conventional semiconductor device
10
is subject to unanticipated charge gain and charge loss because of the spacing of the contact
52
from a particular cell, such as the cell
20
. The current trend in semiconductor technology is toward higher densities. In order to reduce the space occupied by a given conventional semiconductor device
10
, the components of the semiconductor device are more densely packed and made smaller. Thus, the cells
20
,
30
and
40
and the conventional contact
52
are relatively close. The thickness of the spacers
26
and
28
,
36
and
38
and
46
and
48
is between approximately one thousand and two thousand Angstroms. The conventional contact
52
is approximately 0.28 to 0.4 &mgr;m wide. However, in general, it is difficult to provide conventional contacts
52
which are less than 0.28-0.3 &mgr;m wide. For example, in some conventional technology, the widths of the conventional contacts
52
are centered around 0.28 &mgr;m. This distance is approximately the smallest that an aperture in a photoresist mask (not shown) can be made using conventional photolithographic techniques. The photoresist mask is used in forming the conventional contact hole
50
by etching the underlying areas of the insulating layer
54
. The conventional contact
52
is also closely spaced to neighboring cells
20
,
30
and
40
. In particular, the distance between the base of the conventional contact
52
and the edge of a nearest gate in a gate stack, such as the gate stack
21
, is very small. In some cases, the distance between the gate stack and the contact may be between 0.15 and 0.3 &mgr;m.
The small spacing between the conventional contact
52
and the gate stack of particular cell, such as the cell
20
, causes unanticipated charge gain and charge loss from the cell
20
. Because the conventional contact
52
is typically separated from the edge of the gate stack
21
by such a small distance, the portion of the insulating layer
54
between the conventional contact
52
and the gate stack
21
is very thin. The combination of the spacer
26
and the insulating layer
54
may not provide sufficient insulation to prevent the gate stack
21
from being electrically coupled to the conventional contact
52
through the spacer
26
and insulating layer
54
. For example, charge on the conventional contact
52
may travel to the gate stack
21
when a user does not desire the floating gate
22
to store charge. Similarly, a charge stored on the floating gate
22
may travel to the conventional contact
52
. Thus, a charge intentionally stored on the floating gate
22
may bleed away. Consequently, the cell
20
is subject to unanticipated charge gain and charge loss. As a result, the cell
20
may not function as desired.
Accordingly, what is needed is a system and method for providing contacts in a semiconductor device which has reduced charge gain and charge loss. The present invention addresses such a need.
SUMMARY OF THE INVENTION
The present invention provides a method and system for providing a contact in a semiconductor device including a plurality of gates. The method and system comprise providing an insulating layer substantially surrounding at least a portion of the plurality of gates and providing at least one contact within the insulating layer. The at least one contact has a reduced width of less than approximately 0.28 &mgr;m.
According to the system and method disclosed herein, the present invention provides a greater spacing between the contact and the closest gate stack without increasing the spacing between gate stacks or between the center of the contact and the gate stack. Consequently, a higher density of devices can be achieved while reducing the charge gain and charge loss through the contact.


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