Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-09-20
2005-09-20
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C324S765010
Reexamination Certificate
active
06948106
ABSTRACT:
A method and system for partial scan testing of integrated circuits is disclosed. The invention includes determining at least one failed functional block during testing of the integrated circuit. The failed functional block is then logically isolated from the remaining non-failing functional blocks. Scan testing of the remainder of the non-failing functional blocks then occurs to determine the integrity of the remainder of the integrated circuit. The data coming out of the failing functional block is not allowed into the other functional blocks as input data. The invention allows the integrated circuit to be used and sold at a reduced functionality for applications not requiring the failed functional block(s).
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Abraham Esaw
De'cady Albert
Whyte Hirschboeck Dudek SC
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