Method and system for memory updates within a multiprocessor dat

Details Method and system for memory updates within a multiprocessor dat Method and system for memory updates within a multiprocessor dat

1997-04-18

2000-06-06

Cabeca, John W.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711117, 711118, 711119, 711120, 711121, 711141, 711144, 711145, 711148, 711155, 711152, 711210, G06F 1212

Patent

active

060732113

ABSTRACT:
An apparatus is disclosed which supports memory updates within a data processing system including a number of processors. The apparatus includes a memory hierarchy including one or more upper levels of memory. Each upper level within the memory hierarchy includes one or more memory units which each store a subset of all data stored within an associated memory unit at a lower level of the memory hierarchy. Each memory unit at the highest level within the memory hierarchy is associated with a selected processor. In addition, the apparatus includes a reservation indicator associated with each memory unit within the memory hierarchy. For memory units at the highest level within the memory hierarchy, the reservation indicator specifies an address for which the processor associated with that memory unit holds a reservation. At each lower level within the memory hierarchy, the reservation indicator specifies addresses for which associated memory units at higher levels within the memory hierarchy hold a reservation. A reservation for a selected address within a memory unit is resolved at a highest level within the memory hierarchy at which a memory unit stores data associated with the selected address exclusive of other memory units at that level, thereby enhancing reservation protocol efficiency.

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