Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
Reexamination Certificate
2006-09-15
2011-11-01
Bradley, Matthew (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Generating a particular pattern/sequence of addresses
C711S215000, C711S218000, C711S219000, C717S150000
Reexamination Certificate
active
08051272
ABSTRACT:
A method for generating addresses for a processor is provided. The addresses are for use by an application that may be executed by the processor. The application comprises a plurality of instructions, and each instruction comprises at least one line. The method includes storing a plurality of predetermined addresses and, for each line of each instruction, generating at least one address for the processor based on the predetermined addresses.
REFERENCES:
patent: 6212604 (2001-04-01), Tremblay
patent: 6463518 (2002-10-01), Duboc
patent: 6948160 (2005-09-01), Click et al.
patent: 7085915 (2006-08-01), St. John et al.
patent: 7180328 (2007-02-01), Gould et al.
patent: 7430650 (2008-09-01), Ross
patent: 7665079 (2010-02-01), Yasue et al.
Pieter Op de Beeck, Francisco Barat, Murali Jayapala and Rudy Lauwereins, “CRISP: A Template for Reconfigurable Instruction Set Processors,” Springer-Verlag Berlin Heidelberg 2001.
Bradley Matthew
Parikh Kalpit
Samsung Electronics Co,. Ltd.
LandOfFree
Method and system for generating addresses for a processor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system for generating addresses for a processor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for generating addresses for a processor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4288738