Method and system for gate stack reoxidation control

Details Method and system for gate stack reoxidation control Method and system for gate stack reoxidation control

1997-12-19

2000-01-18

Fahmy, Wael M.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438265, 438911, 29 2501, H01L 2126

Patent

active

060157364

ABSTRACT:
A system and method for providing at least one memory cell on a semiconductor is disclosed. The method and system include providing a tunneling barrier on the semiconductor, providing at least one floating gate having a corner, and oxidizing the tunneling barrier, a portion of the semiconductor, and the at least one floating gate. A portion of the at least one floating gate including the corner is disposed above the tunneling barrier. The portion of the semiconductor oxidizes at a first rate and at least the corner of the at least one floating gate oxidizes at a second rate. The second rate is sufficiently higher than the first rate to provide a desired thickness of the tunneling barrier a distance from the corner of the at least one floating gate for a particular rounding of the corner of the at least one floating gate.

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Applicants Admitted Prior Art, p. 4, lines 1-21.

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