Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-05-10
2005-05-10
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S267000
Reexamination Certificate
active
06890821
ABSTRACT:
A memory device and the method for manufacturing the same is disclosed. The device includes a first oxide layer on top of a substrate, a floating gate layer on top of the first oxide layer, and a second oxide layer over the floating gate layer. The second oxide layer and the floating gate layer have a first opening and a second opening respectively wherein the width of second opening is bigger than the width of the narrowest region of the first opening so that the floating gate layer is pulled back horizontally underneath the second oxide layer. A source region is in the substrate underneath the first oxide layer, and a third oxide layer fills in the first and second openings conforming to the contour thereof. The third oxide has a third opening to reach a portion of the source region. Further, a control gate material fills in the third opening.
REFERENCES:
patent: 6433382 (2002-08-01), Orlowski et al.
patent: 6627946 (2003-09-01), Wang
patent: 6727545 (2004-04-01), Wang et al.
patent: 6773989 (2004-08-01), Wang
Chang Yi-Shing
Chu Wen-Ting
Duane Morris LLP
Nhu David
Taiwan Semiconductor Manufacturing Co. Ltd.
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