Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2006-07-10
2009-06-02
Patel, Nitin C (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S401000, C327S262000
Reexamination Certificate
active
07543171
ABSTRACT:
A method for synchronizing a data signal to a clock signal in a source-synchronous system, the source-synchronous system having first and second systems linked by an interface, the first system providing the clock signal to the second system, the second system providing the data signal and a return clock signal synchronous to the data signal to the first system, the method comprising: determining a first time delay between the clock signal and the return clock signal and delaying the data signal by the first time delay; after a predetermined period, determining a second time delay between the clock signal and the return clock signal; determining a difference between the first and second time delays; and, further delaying the data signal by at least a portion of the difference to thereby compensate for a temperature change of the source-synchronous system.
REFERENCES:
patent: 5794020 (1998-08-01), Tanaka et al.
patent: 6452421 (2002-09-01), Saito
patent: 6505149 (2003-01-01), Griswold et al.
patent: 7222036 (2007-05-01), Thorne
patent: 7453302 (2008-11-01), Le et al.
Buyuktepe Hayrettin
Fortin Eric
Harvey David Martin
Alcatel Lucent
Patel Nitin C
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