Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2011-08-30
2011-08-30
Bragdon, Reginald G (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S157000, C711S158000, C711SE12002, C711SE12010
Reexamination Certificate
active
08010764
ABSTRACT:
A method and system for decreasing power consumption in memory arrays having usage-driven power management provides decreased power consumption in the memory array of a processing system. Per-page usage information is gathered on memory by a memory controller and periodically evaluated by software. The software distinguishes between more frequently accessed pages and less frequently accessed pages by analyzing the gathered usage information and periodically migrates physical memory pages in order to group less frequently accessed pages and more frequently access pages in separately power-managed memory ranks. When used in conjunction with a usage-driven power management mechanism, the ranks containing the less frequently accessed pages can enter deeper power-saving states and/or any power-saving state for longer periods. Operation may be further enhanced by using packed allocation in the memory ranks containing the less-frequently accessed pages and scattered allocation in the memory ranks having more frequently accessed pages.
REFERENCES:
patent: 4669056 (1987-05-01), Waldecker et al.
patent: 5596740 (1997-01-01), Quattromani et al.
patent: 5687382 (1997-11-01), Kojima et al.
patent: 5761695 (1998-06-01), Maeda et al.
patent: 5805873 (1998-09-01), Roy
patent: 5928365 (1999-07-01), Yoshida
patent: 6097662 (2000-08-01), Itou
patent: 6453403 (2002-09-01), Czajkowski
patent: 6636951 (2003-10-01), Tachikawa
patent: 2001/0013087 (2001-08-01), Ronstrom
patent: 2002/0013087 (2002-01-01), Doriski, Jr.
patent: 2002/0103975 (2002-08-01), Dawkins et al.
patent: 2002/0152181 (2002-10-01), Kanai et al.
patent: 2002/0199129 (2002-12-01), Bohrer et al.
patent: 2003/0079151 (2003-04-01), Bohrer et al.
patent: 2004/0123042 (2004-06-01), Shafi et al.
patent: 2005/0125702 (2005-06-01), Huang et al.
patent: 2005/0125703 (2005-06-01), Lefurgy et al.
U.S. Appl. No. 10/738,719, Rawson, et al.
Balasubramonian et al. “Hot and Cold: Using Criticality in the Design of Energy-Efficient Cashes”, 3rd Workshop on PACS, Dec. 2003.
Rajamani, K. et al. “Evaluating Request-Distriubtion Schemes for Saving Energy in Server Clusters”, IEEE Intern Symp on Perf Anly of System Issue ISPASS '03, 2003.
Huang, H. et al. “Design and Implementaion of Power-Aware Virtual Memory” Usenix Annual Tech Conf, 57-70, 2003.
Qingbo Zhu et al. “Reducing Energy Consumption of Dish Storage Using Power-Aware Cache Management” Tenth Inter Symp on High Perf Computer, 2004.
Delaluz, V. et al. “DRAM Energy Management Using Software and Hardware Directed Power Mode Control” Inter Symp on High Perf Comp Architecture. 159-2001. 2001.
Copeland, G. et al. “Data Placement in Bubba” Proceedings of SIGMOD Issue ISPASS '03, 1988, ACM.
Chilimbi, T.M. et al. “Cache-Conscious Strucuture Layout” PLDI '99, May 1999, ACM.
Fan, X et al. “Modeling of DRAM Power Control Policies Using Deterministric and Stochastic Petri Nets” Workshop on Power-Aware Computer Systems, 2002.
Lebeck, A.R. et al. “Power Aware Page Allocation” Asplos Proceedings. 105-116, 2000.
Cohn and P.G. Lowney “Hot Cold Optimization of Large Window/NT Applications” Micro29, 80-89, Dec. 1996, IEEE/ACM.
Delaluz, V. et al. “Scheduler-Based DRAM Energy Management” Design Automation Conf 39, 697-702, 2002.
Fan, X et al. “Memory Controller Policies for DRAM Power Management” Inter Symp on Low Power Elect and Design, 129-134, 2001.
Huang Hai
Keller, Jr. Thomas Walter
Lefurgy Charles R.
Bragdon Reginald G
Harris Andrew M.
International Business Machines - Corporation
Mitch Harris Atty at Law, LLC
Toub Libby Z.
LandOfFree
Method and system for decreasing power consumption in memory... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system for decreasing power consumption in memory..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for decreasing power consumption in memory... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2636402