Method and structure to use an etch resistant liner on...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S199000, C438S382000, C438S216000

Reexamination Certificate

active

07064027

ABSTRACT:
An etch resistant liner covering sidewalls of a transistor gate stack and along a portion of the substrate at a base of the transistor gate stack. The liner prevents silicide formation on the sidewalls of the gate stack, which may produce electrical shorting, and determines the location of silicide formation within source and drain regions within the substrate at the base of the transistor gate stack. The liner also covers a resistor gate stack preventing silicide formation within or adjacent to the resistor gate stack.

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