Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1999-10-08
2000-11-14
Quach, T. N.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438614, 438678, 438926, H01L 2144
Patent
active
06146984&
ABSTRACT:
Uniform height solder bumps are created on a semiconductor wafer by exposing a dummy pattern of under bump metal for solder plating. The dummy pattern of exposed under bump metal follows the outer edge outline of a pattern of die that exists on the semiconductor wafer. The dummy pattern of under bump metal is exposed by removing a portion of a layer of photoresist that is deposited over the under bump metal. The dummy pattern of under bump metal is exposed on the wafer at the same time that under bump metal above the contact pads is exposed. Solder material is then plated onto the exposed under bump metal that exists above the contact pads and in the dummy pattern. The dummy pattern of exposed under bump metal around the outer edge of the die pattern causes current crowding to occur primarily at the dummy pattern of exposed under bump metal instead of at the contact pads that are on die at the outer edge of the die pattern. Because current crowding occurs primarily at the dummy pattern of exposed under bump metal instead of at the exposed under bump metal above the contact pads of the outer edge die, the plating current density across the die pattern is more uniform, thereby producing solder bumps having a more uniform height.
REFERENCES:
patent: 5391285 (1995-02-01), Lytle et al.
patent: 5508229 (1996-04-01), Baker
patent: 5670034 (1997-09-01), Lowery
patent: 5763057 (1998-06-01), Sawada et al.
patent: 5767010 (1998-06-01), Mis et al.
patent: 5903058 (1999-05-01), Akram
patent: 5981314 (1999-11-01), Glenn et al.
patent: 6077765 (2000-06-01), Naya
patent: 6080650 (2000-06-01), Edwards
patent: 6085968 (2000-07-01), Swindlehurst et al.
Leibovitz Jacques
Swindlehurst Susan J.
Agilent Technologie,s Inc.
Quach T. N.
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