Semiconductor device manufacturing: process – Electromigration resistant metallization
Reexamination Certificate
1999-08-18
2002-10-15
Whitehead, Jr., Carl (Department: 2822)
Semiconductor device manufacturing: process
Electromigration resistant metallization
C438S626000, C438S627000, C438S643000, C438S645000, C438S665000
Reexamination Certificate
active
06465376
ABSTRACT:
DESCRIPTION OF TECHNICAL FIELD
The present invention relates to metal interconnects and more particularly metal interconnects having improved electromigration properties. The present invention also relates to a process for achieving improved electromigration.
BACKGROUND OF THE INVENTION
On VLSI and ULSI semiconductor chips, Al and alloys of Al are used for conventional chip wiring material. More recently Cu and alloys of Cu has been suggested as a chip wiring material. The use of Cu and Cu alloys results in improved chip performance and superior reliability when compared to Al and alloys of Al.
However, the reliability of aluminum-based and copper-based interconnections in electronic circuits is generally limited to a phenomenon known as electromigration. As microelectronic circuits are made more dense in order to improve performance, the electric fields (and resulting current densities) in the aluminum and copper interconnectors increase. Hence, as circuit densities increase, the rate of electromigration also increases.
Electromigration leads to circuit failure primarily via two mechanisms. In the first aluminum or copper electromigrates away from a region in the interconnector faster than the availability of additional atoms can take its place. This process generates a void in the interconnection. Growth of this void increases the electrical resistance of the interconnection to a point where circuit failure occurs. The second means by which electromigration failure occurs is when metal electromigrates into a region faster than it escapes the region, thus locally piling up metal atoms (called extrusions) to a point where it extends to the adjacent interconnection line, thereby causing an electrical short circuit.
The microstructure, especially of pure copper and aluminum is unstable after deposition onto a substrate. Upon annealing at elevated temperature, massive atomic mobility at the surface of the metals, especially copper, results in grainboundary grooving. In extreme cases, local separation between two adjacent grains may be larger than 4 nanometers. This local separation enhances grain decohesion during electromigration testing.
The problem of electromigration has been approached in a number of ways, the two most common are: (1) introducing a second species into the parent metal, e.g., alloying aluminum with a 0.2% to 4% copper, and (2) utilizing a redundant metal layer, e.g., titanium, tungsten or chromium layer(s) under and/or over the aluminum or copper lines.
While the above methods increase electromigration lifetime, there still remains room for improvement.
SUMMARY OF THE INVENTION
The present invention provides a method and structure that improves the electromigration of the metal interconnect. Moreover, the present invention provides a method and structure that addresses the problem of grainboundary grooving.
In particular, the method of the present invention comprises depositing a conductive layer of aluminum, copper or alloys thereof on a substrate, and thermally annealing the conductive layer at a temperature of about 250 to about 400° C. forming grainboundaries in the conductive layer. A barrier material is then deposited in the grainboundaries.
The present invention also relates to a microstructure obtained by the above process.
Another aspect of the present invention is concerned with a microstructure that comprises a conductive layer of aluminum, copper or alloys thereof on a substrate wherein the layer comprises metal grains of at least about 0.1 microns and barrier material deposited in the grainboundaries at the surface of the metal.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrate in nature and not as restrictive.
REFERENCES:
patent: 4680854 (1987-07-01), Ho et al.
patent: 4962060 (1990-10-01), Sliwa et al.
patent: 5018001 (1991-05-01), Kondo et al.
patent: 5084412 (1992-01-01), Nakasaki
patent: 5262354 (1993-11-01), Cote et al.
patent: 5290733 (1994-03-01), Hayasaka et al.
patent: 5300307 (1994-04-01), Frear et al.
patent: 5371042 (1994-12-01), Ong
patent: 5470788 (1995-11-01), Biery et al.
patent: 5755859 (1998-05-01), Brusic et al.
patent: 5793272 (1998-08-01), Burghartz et al.
patent: 5807165 (1998-09-01), Uzoh et al.
patent: 5963835 (1999-10-01), Sandhu et al.
patent: 5969422 (1999-10-01), Ting et al.
patent: 6043153 (2000-03-01), Nogami et al.
patent: 6103624 (2000-08-01), Nogami et al.
patent: 62-234343 (1987-10-01), None
patent: 62-234345 (1987-10-01), None
patent: 62-234346 (1987-10-01), None
patent: 62240733 (1987-10-01), None
patent: 62240734 (1987-10-01), None
patent: 62240735 (1987-10-01), None
patent: 62240736 (1987-10-01), None
patent: 62240737 (1987-10-01), None
patent: 62240738 (1987-10-01), None
patent: 62240739 (1987-10-01), None
Revitz et al, “Electromigration Resistance for Ta Au Ta Metallurgy”, IBM TDB, Feb. 1973, p. 2930.
Colgan et al, IBM TDB, No. 5, Oct. 1990, p. 134.
Gupta et al, “Utilization of Copper Transition Alloys in Integrated Circuits”, IBM TDB, No. 7, Dec. 1992, pp. 133-134.
Edelstein Daniel C.
Simon Andrew
Uzoh Cyprian Emeka
Abate Joseph P.
Jr. Carl Whitehead
Novacek Christy
Pollock, Vande Sande & Amernick RLLP
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