Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-07-02
2002-01-29
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S108000
Reexamination Certificate
active
06342443
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is related to the method of forming a flip die packaged on a substrate used in semiconductor packaging process. More particularly, the present invention is related to the method of forming a flip die with controlled collapse solder bumps packaged on a polymer substrate used in semiconductor packaging process.
2. Description of the Related Art
Flip die packages require consideration of solder bump properties of bonding and collapse control. The commonly used solder bump with better properties bonding and collapse control is the so-called C4 solder bump. It is necessary to adopt a ceramic substrate since the C4 solder bump has a high melting point (higher than 300° C.) and undergoes treatment at high temperatures. So, substrates with polymer material which cannot sustain such high temperatures are not suitable for the packaging of the flip die with a C4 solder bump, even thought the polymer substrates are more popular than the ceramic ones. Therefore, in choosing which type solder to use in the polymer substrate, melting point and bonding properties of the material must be considered.
Solder with Sn/Pb alloy in the ratio of 63/37 is most popular for making flip die on polymer substrate at present. However, such solder causes the serious problem of collapse during the thermal treatment process. As illustrated in
FIGS. 10
a
and
10
b,
solder bump
8
has collapsed at the end of the reflowing process, shrinking the stand-off between the die and the substrate. The stand-off distance is an important factor affecting the lifetime of the flip die package. Since the coefficient thermal expansion (CTE) of the die is different from that of the substrate, it will cause continuous transition of high/low temperatures while a die is in continuous operation by unavoidable ON/OFF switching. Short stand-off distance will cause the stress induced from thermal mismatch between the die and the substrate to increase, so that the lifetime of the die package will be decreased.
The method for adding solder with a lower melting point onto the pad of the substrate and then combining the die with solder bumps to the substrate by utilizing solder with a lower melting point to bond the solder bumps and substrate together is the main method utilized in prior art. The method of positioning the solder with a lower melting point is to first set a solder mask above the substrate and then spread solder paste with lower a melting point onto the mask. The apertures of the mask correspond to the position of the pads above the substrate, and the solder paste is thus spread on the pads of the substrate. However, the solder mask is formed by making a stencil necessary to make a different stencil for each type of mask, this increases the expense of making stencils. Also, if the solder paste touches the stencil, it causes the inevitable problem of pollution of solder paste.
SUMMARY OF INVENTION
The primary objective of this invention is to provide a method of producing a collapse-controlled flip die on a polymer substrate for an integrated circuit package. A second solder on the C4 solder bump forms a second solder bump, since the second solder has a lower melting point and collapse-controlled C4 solder bump, the second solder bump has a lower temperature for heat treatment that the polymer substrate can withstand and better collapse-controll property.
The secondary objective of this invention is to provide a method for producing a collapse-controlled flip die on a polymer substrate for the integrated circuit package that does not necessitate making a new stencil for different IC die in the process of forming second solder bumps, and the pollution from contact of solder and mask will be avoided. In accordance with the present invention, the method of making a mask for positioning of the solder is replaced in this invention by a jet method. In order to jet the droplets of melting solder onto the C4 solder bumps of the die, jetting equipment with a micro-computer and an auto-stage is adopted and the positions of the C4 solder bumps are put into the micro-computer, positioning printhead above the location for C4 solder bump jetting.
Other objectives, advantages and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 5290732 (1994-03-01), Kumar
patent: 6107180 (2000-08-01), Munroe
Fang Jen-Kuang
Tao Su
Wang Wei-Chung
Advanced Semiconductor Engineering Inc.
Bacon & Thomas
Berezny Nema
LandOfFree
Method and structure for forming flip chip with... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and structure for forming flip chip with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and structure for forming flip chip with... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2829655