Method and resulting structure for fabricating DRAM...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S254000, C438S396000, C257SE21648

Reexamination Certificate

active

07611945

ABSTRACT:
A method for forming a capacitor structure for a dynamic random access memory device. The method includes forming a device layer overlying a semiconductor substrate, e.g., silicon wafer. The method includes forming a first interlayer dielectric overlying the device layer and forming a via structure within the first interlayer dielectric layer. The method includes forming a first oxide layer overlying the first interlayer dielectric layer and forming a stop layer overlying the first oxide layer. The method includes forming a second oxide layer overlying the first stop layer and forming a trench region through a portion of the second oxide layer, through a portion of the stop layer, and a portion of the second oxide layer. A bottom electrode structure is formed to line the trench region. The bottom electrode structure includes an inner region. The bottom electrode structure is coupled to the via structure. The method includes protecting the bottom electrode structure with a masking layer and selectively removing the second oxide layer to the stop layer, the stop layer acts as an etch stop, to expose an outer region of the bottom electrode structure. The method includes forming a capacitor dielectric layer overlying the outer region of the bottom electrode structure and overlying the inner region of the bottom electrode structure. The method includes forming an upper capacitor plate overlying the capacitor dielectric layer to form a capacitor structure.

REFERENCES:
patent: 2003/0067029 (2003-04-01), Zheng
patent: 2005/0196920 (2005-09-01), Suzuki
patent: 2006/0286744 (2006-12-01), Nishikawa et al.

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