Method and mechanism for controlling power consumption of an...

Details Method and mechanism for controlling power consumption of an... Method and mechanism for controlling power consumption of an...

2006-01-04

2009-08-25

Chen, Tse (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

By external command

C713S300000

Reexamination Certificate

active

07581124

ABSTRACT:
A PLD includes a plurality of logic blocks, a test circuit, and a test pin set. The logic blocks are coupled to gating circuits that selectively adjust an operating voltage for the blocks in response to control signals. During operation of the PLD, the control signals are updated in response to externally-generated signals provided to the PLD via the test pin set and routed to the logic blocks using the test circuit.

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