Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-09-20
2005-09-20
Decady, Albert (Department: 2184)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S819000, C324S523000, C327S603000
Reexamination Certificate
active
06948107
ABSTRACT:
The invention relates to a method and an installation for fast location of a fault in an integrated circuit. A sequence of NRZ location vectors is created, the abnormal location vectors are determined, for which the value of the electrical consumption current at rest IDDQ of the circuit is abnormal, at least one set of images is produced with an abnormal location vector, and at least one abnormal vector image is compared with a reference image.
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Desplats Romain
Perdu Philippe
Britt Cynthia
Centre National d'Etudes Spatiales (C.N.E.S.)
De'cady Albert
Young & Thompson
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