Method and device for performing cache reading

Details Method and device for performing cache reading Method and device for performing cache reading

2011-03-15

2011-03-15

Song, Jasmine (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S166000, C711S167000, C711S168000, C711S169000, C365S189040, C365S189050, C365S203000, C713S001000

Reexamination Certificate

active

07908425

ABSTRACT:
In a read method for a memory device, a bit line is set with data in a first memory cell; and the data on the bit line is stored in a register. The data in the register is transferred to a data bus while setting the bit line with data in a second memory cell. In another read method for a memory device, a bit line of a first memory cell is initialized and the bit line is pre-charged with a pre-charge voltage. Data in a memory cell on the bit line is developed, and a register corresponding to the bit line is initialized. The data on the bit line is stored in the register. The data in the register is output externally while performing the initializing, pre-charging, making and initializing to set the bit line with data in a second memory cell.

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German Office Action (dated May 29, 2008) for counterpart German Patent Application No. 10 2005 014 815.8 is provided for the purposes of certification under 37 C.F.R. §§ 1.97(e) and 1.704(d).

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