Method and device for detecting whether the alignment of bit...

Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed

Reexamination Certificate

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C438S386000, C438S462000

Reexamination Certificate

active

06984534

ABSTRACT:
Method for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal, and a test device thereof. In the present invention a plurality of memory cells are formed in the memory area and at least one test device is formed in the scribe line region simultaneously. A first resistance and a second resistance are detected by the test device. Normal alignment of the bit line and the bar-type active area of the test device is determined according to the first resistance and the second resistance. Finally, whether the alignment of the bit line contacts and the active areas in memory areas is normal is determined according to whether the alignment of the bit line contact and bar-type active area of the test device is normal.

REFERENCES:
patent: 6339228 (2002-01-01), Iyer et al.
patent: 6529427 (2003-03-01), Guo

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