Method and circuitry for writing data

Details Method and circuitry for writing data Method and circuitry for writing data

1999-06-25

2000-08-08

Nguyen, Viet Q.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365194, 3652335, 365233, 365191, G11C 11407

Patent

active

061011347

ABSTRACT:
An apparatus comprising a first circuit, a reset circuit and an output circuit. The first circuit may be configured to generate one or more state signals in response to (i) a first and a second write control signals and (ii) one or more control signals. The reset circuit may be configured to generate the one or more control signals in response to (i) a global write signal and (ii) the first and second state signals. The output circuit may be configured to generate a third and fourth write control signal in response to (i) the global write signal (ii) a data input signal and (iii) the first and second state signals. In one example, the third and fourth write control signals may generate a pulse on either the third or the fourth write control signals in response to a transition of the data input signal.

REFERENCES:
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patent: 5717654 (1998-02-01), Manning
patent: 5721859 (1998-02-01), Manning
patent: 5751644 (1998-05-01), Ansel et al.
patent: 5764591 (1998-06-01), Matsui

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