Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Reexamination Certificate
2002-11-26
2004-08-10
Le, Don (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Signal level or switching threshold stabilization
C326S027000, C326S083000
Reexamination Certificate
active
06774666
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to methods of generating a constant current source and mirroring the constant current source to an integrated circuit that may need a constant current, and more particularly an analog bias circuit using a current source and a mirroring scheme that are both insensitive to process, voltage, and temperature variations.
BACKGROUND OF THE INVENTION
Existing low voltage differential signal (LDVS) systems may use drivers with stacked output transistors providing the current drive necessary for LVDS standards. These existing systems may use a pMOS bias transistor operated in the linear region so that it acts similar to a resistor. A disadvantage to this driver scheme is that the linear region pMOS makes the differential output voltage intolerant to supply voltage variation. The bias-voltage generator in such existing systems inherently cannot control the driver to provide a constant differential voltage when it tries to increase an Nbias voltage to compensate for an increase in the supply voltage, thereby leaving it relatively susceptible to supply variations.
U.S. Pat. No. 6,448,811 by Narenda et al. (“Narenda”) discusses a circuit that creates a process-insensitive current source. Narenda, however, does not discuss or focus on circuits that are insensitive to voltage or temperature variations. Narenda utilizes a feedback control system to actively monitor and control the current, and also relies on the use of an external resistor. Basically, Narenda deals with an active method of using a low tolerance external resistor to ensure that on-chip current stays constant across process variations.
Thus a need exists for a bias-voltage generator (and accompanying driver) that increases the tolerance of a driver or other circuit to process, supply voltage, and temperature variations. A current source that is insensitive to process, voltage, and temperature variations may be used in a wide variety of applications.
SUMMARY OF THE INVENTION
According to one embodiment of the present invention, an analog bias circuit uses a process, voltage, and temperature (PVT) insensitive current source and a PVT insensitive mirroring system that can be used to bias low voltage differential signal (LVDS) output drivers and other circuits requiring a PVT insensitive current source. For an LVDS driver, a bias circuit in accordance with the present invention can be designed to allow the LVDS driver to meet the required electrical specifications across process corners (e.g., 3-sigma variation on transistor parameters such as mobility, threshold voltage, channel resistance, etc.), supply voltage (e.g., 2.3V to 2.7V), and temperature (e.g., −50 to 150 degrees Celsius). One aspect of the present invention utilizes the special characteristics of a transistor biased at an optimal gate-source voltage to achieve virtually zero temperature coefficient conductivity, enabling the current source to be independent of temperature variations by balancing the opposing temperature-dependent effects of mobility and threshold voltage.
According to one embodiment of the present invention, the tolerance of a circuit to process, supply voltage, and temperature variations is increased by using a new architecture that uses a current source and at least one mirroring circuit that are insensitive to process, voltage, and temperature variations. In contrast to the circuit described in Narenda, the present invention does not require any feedback type of control. Also, the present invention does not need any external devices to operate.
Although much of the focus of the present invention is on voltage and temperature insensitivity, the present invention also minimizes process sensitivity in the current generator, and has a current mirroring scheme that is very process insensitive as well.
REFERENCES:
patent: 5428303 (1995-06-01), Pasqualini
patent: 6448811 (2002-09-01), Narendra et al.
patent: 6628558 (2003-09-01), Fiscus
patent: 2002/0027470 (2002-03-01), Narendra et al.
Le Don
Liu Justin
Meles Pablo
Xilinx , Inc.
Young Edel M.
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