Method and circuit for configuring I/O devices

Details Method and circuit for configuring I/O devices Method and circuit for configuring I/O devices

1993-03-26

1994-12-13

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518908, 36518902, 36523008, 327203, 327199, G11C 700

Patent

active

053734700

ABSTRACT:
A method and circuit for configuring I/O devices, such as a DRAM or other memory device, uses master-slave buffer circuits in configurable I/O devices. When arranged in a master-slave arrangement, the slave data buffer is adapted to receive both input data and the output of an associated master circuit. In one configuration, each data buffer outputs data based upon the input data. In another configuration, each slave buffer outputs the output of an associated master buffer. The circuit of the present invention is preferably employed with a configurable I/O device incorporated in a lead-on-chip (LOC) package, although could be used in any configurable I/O device.

REFERENCES:
patent: 4680491 (1987-07-01), Yokouchi
patent: 4995003 (1991-02-01), Watanabe
patent: 5068881 (1991-11-01), Dervisoglu
patent: 5146427 (1992-09-01), Sasaki
patent: 5214609 (1993-05-01), Kato

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