Static information storage and retrieval – Read/write circuit – Precharge
Patent
1979-12-07
1981-07-21
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Precharge
365154, 307459, 3072385, G11C 1140
Patent
active
042801982
ABSTRACT:
In integrated semiconductor memory cell arrangements, particularly integrated semiconductor memory cell arrangements using merged transistor logic configurations, line capacitances are discharged before accessing to reduce access time and power consumption. Individual bit line transistor switching means are coupled to each bit line to provide a discharge path for the line capacitances associated therewith. Common transistor switching means are coupled to each individual bit line transistor switching means to commonly discharge the individual discharge currents received from each individual bit line transistor switching means. Individual word line transistor switching means are also connected to respective word lines to distribute the current passing through the common transistor switching means to the respective word lines. The discharge circuit arrangement permits minimum-area bit line and word line transistor switching means.
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Heuber Klaus
Wiedmann Siegfried K.
Fears Terrell W.
International Business Machines - Corporation
Jordan John A.
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