Method and arrangement for passing data between a reference chip

Details Method and arrangement for passing data between a reference chip Method and arrangement for passing data between a reference chip

1998-12-18

2000-11-28

Auve, Glenn A.

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710101, 710102, 710104, 710126, 710129, 711167, G06F 1300

Patent

active

061548030

ABSTRACT:
A method and arrangement passes data between two busses without needing conventional bridge-interface protocols. Consistent with one method embodiment of the present invention, data is passed between a first bus on a reference chip and an external bus using a two-way buffer arrangement between the external bus and the first bus. The method includes coupling a two-way buffer arrangement between the external bus and the first bus, determining which of the busses is the initiating bus, and in response to this determination, controlling the two-way buffer arrangement to asynchronously copy data through the two-way buffer arrangement from the initiating bus to the other bus, wherein data is passed automatically in response to its presence at the buffer arrangement without any clock cycle delays. An example application is directed to interfacing with a bus used for a rapid silicon processing chip.

REFERENCES:
patent: 5301282 (1994-04-01), Amini et al.
patent: 5592685 (1997-01-01), Pawlowski
patent: 5619729 (1997-04-01), Bland et al.
patent: 5644729 (1997-07-01), Amini et al.
patent: 5649161 (1997-07-01), Andrade
patent: 5673414 (1997-09-01), Amini et al.
patent: 5987539 (1999-11-01), Goodrum

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