Method and apparatus transporting charges in semiconductor...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S211000, C438S259000, C438S261000, C438S513000, C257S314000, C257S315000, C257S316000, C257S324000, C257SE21170, C257SE21680, C257SE21585, C257SE27103, C365S185180

Reexamination Certificate

active

07741177

ABSTRACT:
A method of providing a memory cell comprises providing a semiconductor substrate including a body of a first conductivity type, first and second regions of a second conductivity type and a channel between the first and second regions; arranging a first insulator layer adjacent to the substrate; arranging a charge storage region adjacent to the first insulator layer; arranging a second insulator layer adjacent to the charge storage region; arranging a first conductive region adjacent to the second insulator layer; arranging a layer adjacent to the first conductive region; arranging a second conductive region adjacent to the layer; and increasing mechanical stress of at least one of the first and second conductive regions. The second conductive region overlaps the first conductive region at an overlap surface, and wherein a line perpendicular to the overlap surface intersects at least a portion of the charge storage region.

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