Method and apparatus to prevent high voltage supply...

Details Method and apparatus to prevent high voltage supply... Method and apparatus to prevent high voltage supply...

2008-05-06

2008-05-06

Luu, Pho M. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S189011, C365S189090

Reexamination Certificate

active

07369446

ABSTRACT:
An improved cross-coupled CMOS high-voltage latch that is used for storing data bits to be written to memory cells of a non-volatile memory is provided with a switching circuit that, during writing of data bits into the memory cells of the latch, provides a high series impedance between one leg of the latch and ground to limit leakage current. A large number of latches are connected in parallel and their accumulated leakage currents are limited by the switching circuit to prevent overload of a high-voltage generator, such as a charge pump circuit, for the high-voltage latch, so that data can be properly written in the memory cells of the non-volatile memory.

REFERENCES:
patent: 5963054 (1999-10-01), Cochran et al.
patent: 6157577 (2000-12-01), McPartland
patent: 6414518 (2002-07-01), Patel et al.
patent: 6768682 (2004-07-01), Yano et al.
patent: 6903977 (2005-06-01), Fujiwara et al.
patent: 6972234 (2005-12-01), Madurawe et al.
patent: 7209403 (2007-04-01), Santin
patent: 7224624 (2007-05-01), Lee et al.

Affiliated with

Also associated with

Rating

Method and apparatus to prevent high voltage supply... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus to prevent high voltage supply..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus to prevent high voltage supply... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2805430