Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-07-18
2006-07-18
Lamarre, Guy (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S776000
Reexamination Certificate
active
07080308
ABSTRACT:
Embodiments to perform improved error control using packet fragments are described. The apparatus may include a padding module to add a pad byte to uneven packet fragments of a packet, a partial checksum generator module to generate a partial error control value for each packet fragment, a pseudo-header generator module to generate a pseudo header for the packet, and a partial checksum combiner module to combine the partial error control values into an error control value. Other embodiments are described and claimed.
REFERENCES:
patent: 5606561 (1997-02-01), Scheibel et al.
patent: 5889772 (1999-03-01), Fischer et al.
patent: 6181683 (2001-01-01), Chevillat et al.
patent: 6742045 (2004-05-01), Albert et al.
patent: 6779050 (2004-08-01), Horton et al.
Chaudry Mujtaba
Intel Corporation
Kacvinsky LLC
Lamarre Guy
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