Method and apparatus for writing a pattern on a semiconductor sa

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364489, 364488, 2504923, G06F 1560, H01J 37304

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active

051827182

ABSTRACT:
A method of correcting design patterns in cells, having hierarchial structure and corresponding to exposure patterns, for proximity effects when exposing resist coated on a substrate to a charged-particle beam or to light. A first frame zone is provided having a predetermined width inside the boundary of each cell, and a second frame zone is provided having a predetermined width inside the first frame zone. Proximity effect correction operations are performed such that a pattern in the second frame zone and a pattern inside the second frame zone are used as a pattern to be corrected and a pattern in the first frame zone is used as a reference pattern when correcting pattern data in each cell for proximity effects and a pattern in the first frame zone in each cell is added to the pattern to be corrected and a pattern in the second frame zone in each cell is used as a reference pattern when correcting pattern data in a cell directly overlying each cell for proximity effect.

REFERENCES:
patent: 4812962 (1989-03-01), Witt
patent: 5008553 (1991-04-01), Abe
"Data Processing System of Electron-Beam Lithography for VLSI Microfabrication" by Sugiyama et al., IEEE Trans. on Electron Devices, vol. ED-26, No. 4, Apr. 1979, pp. 675-685.
Journal Applied Physics 50 (1979), pp. 4371-4387.

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