Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...
Reexamination Certificate
2000-10-06
2002-09-10
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
C438S745000, C427S492000, C427S377000, C257S759000
Reexamination Certificate
active
06448186
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method and precursors for forming low dielectric constant insulator material in integrated circuits.
2. Statement of the Problem
As semiconductor technology advances, circuit elements and interconnections on wafers or silicon substrates become increasingly more dense. As a result of the continuing trend toward higher device densities, parasitic interdevice currents are increasingly problematic. In order to prevent unwanted interactions between these circuit elements, insulator-filled gaps, or trenches, located between active circuit devices and metallized interconnect layers are provided to physically and electrically isolate the elements and conductive lines.
For example, in metal-oxide-semiconductor (“MOS”) technology, it is necessary to provide an isolation structure that prevents parasitic channel formation between adjacent devices, such devices being primarily NMOS and PMOS transistors or CMOS circuits. Trench isolation technology has been developed in part to satisfy such insulation needs. The trenches are subsequently refilled with a dielectric, such as silicon dioxide, typically by a chemical vapor deposition (“CVD”) technique.
Similar isolation techniques are used to separate closely spaced circuit elements that have been formed on or above a semiconductor substrate during integrated circuit fabrication. The circuit elements may be active devices or conductors, and are isolated from each other by refilled “gaps”.
The capacitance across a gap is governed by the formula
C=∈
r
kA/t,
where C is the capacitance, ∈
r
is the relative dielectric constant of the gap fill material, k is a constant, A is the area of the gap (i.e., the area of the side of the circuit element forming the gap), and t is the thickness or width of the gap. As gap widths decrease with increasing density, the capacitance across the dielectric gap fill material increases. Thus, as integrated circuits become increasingly dense, decreasing t, it is necessary to lower the dielectric constant of the gap fill material to reduce cross-talk, capacitive coupling and resulting speed degradation, and power consumption. To compensate for smaller gap dimensions, it is known to substitute dielectric materials having dielectric constants lower than silicon dioxide.
In damascene process techniques, the dielectric material is deposited as a blanket, either without or with minimal gap-fill requirements. Trenches or vias are then etched in this material, and these are filled with conductor material. Although the dielectric material is deposited first, and conductive material is used to fill the gaps, the need for a low dielectric blanket material between circuit elements is similar to the described requirement for a low-dielectric constant gap-fill material.
In addition to filling gaps, or trenches, between active devices or local interconnects, there is also a need for a low-dielectric constant insulator material for use as interlayer dielectric (“ILD”) and other insulating layers in integrated circuit devices. Thus, there is a need for a method of depositing insulating material having a relative dielectric constant, ∈
r
of 3.0 or less.
It is known that carbon-containing silicon oxide films have lower dielectric constants than silicon oxide films. It is believed that the carbon works by decreasing the effective density of the film, since a film of zero density, that is, a vacuum, has a dielectric constant of
1
. Also, carbon contained in silicon oxide films, for example, in CH
3
groups, is usually less polarizable than silicon oxide, thereby lowering the capacitance, or dielectric constant, of the thin film. It is, therefore, known in the art to deposit a carbon-containing silicon oxide film by reacting an organic carbon-containing gaseous precursor compound and a silicon-containing gaseous precursor compound in a PECVD or HDP-CVD process. Typically, a single type of precursor compound contains both silicon and an organic carbon-containing group. For example, it is known to react a gaseous organo silane, such as a methyl silane, in the presence of nitrous oxide in a PECVD process to form a carbon-containing silicon oxide dielectric film. Whereas PECVD SiO
2
typically has a measured ∈
r
of 4.0-4.2, SiO
2
doped with carbon can have a reduced her of less than 3.0. The economic feasibility of a PECVD process is determined by, among other factors, the deposition rate. Carbon-containing a SiO
2
films have deposition rates that increase as a function of increasing high-frequency radio frequency (“hf rf”) power, and as a function of increasing nitrous oxide, N
2
O, flow. Increasing hf rf power, however, has a detrimental effect on wafer uniformity, and increasing nitrous oxide flow reduces the amount of carbon in the film, thereby increasing the dielectric constant, ∈
r
.
Design feature widths of integrated circuit devices are currently approaching 0.25 &mgr;m, or 250 nm. To achieve corresponding overall circuit density, gap dimensions of approximately 100 nm to 400 nm gap width range and 300 nm to 1000 nm gap depth range are desired, having a corresponding range of aspect ratios of 2 to 6. A gap opening of 500 nm or less is too small for depositing material using conventional CVD and PECVD methods. Currently, high density plasma (“HDP”) CVD is used to fill high aspect ratio gaps. Also, using HDP-CVD, it is usually possible to deposit silicon oxide films at lower temperatures (e.g., 150° C. to 250° C.) than in a PECVD process. It is known that the addition of carbon to a SiO
2
dielectric film formed by an HDP-CVD process also lowers the dielectric constant of the dielectric material. HDP-CVD processes typically use a gas mixture containing oxygen, silane, and inert gases, such as argon. In an HDP process, an rf bias is applied to a wafer substrate in a reaction chamber. Some of the gas molecules, particularly argon, are ionized in the plasma and accelerate toward the wafer surface when the rf bias is applied to the substrate. Material is thereby sputtered when the ions strike the surface, resulting in simultaneous deposition and etching of the dielectric film. This simultaneous deposition and etching is a problem because silicon-carbon bonds, for example, Si—CH
3
bonds, are less robust than Si—O bonds of silicon oxide. The undesired result is that carbon is preferentially etched from the deposited dielectric film, causing the dielectric constant of the final film to be higher.
Solution
In a method in accordance with the invention, the reactant gas mixture in a plasma-enhanced CVD process includes a hydrogen-containing chemical species for forming Si—H bonds in a novel carbon-containing silicon oxide film in which both Si—C and Si—H bonds are present. Typically, the CVD reactant gas mixture contains silicon, oxygen, hydrogen and carbon atoms. Because dielectric material deposited in accordance with the invention has a significant number of Si—H bonds, which are more robust than Si—C bonds, it is more resistant to undesired etching, oxidation and other physical changes during fabrication than dielectric material formed by conventional methods. A dielectric film formed in accordance with the invention typically has a dielectric constant less than 3. The invention provides a novel method for rapidly depositing in an integrated circuit a novel, low dielectric constant film having enhanced uniformity characteristics. The dielectric film in accordance with the invention may be viewed as a silicon oxide film having Si—C and Si—H bonds, as well as Si—O bonds.
The invention may be used to deposit a premetal dielectric layer (“PMD”), an intermetal dielectric layer (“IMD”), an interlayer dielectric layer (“ILD”), a passivation layer and other insulator films requiring a low dielectric constant in an integrated circuit. The invention is most useful when applied to deposit a thin film of low dielectric constant material in a gap, or trench, between active devices or conductive interconnects in high density integrated ci
Krebs Jerrod Paul
Olson Darin S.
Ravi Tirunelveli S.
Swope Richard S.
Everhart Caridad
Lathrop & Gage L.C.
Novellus Systems Inc.
Swenson, Esq. Thomas
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