Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2000-10-19
2004-07-27
Olsen, Allan (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S710000, C438S714000, C216S067000, C216S069000, C216S079000
Reexamination Certificate
active
06767838
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to method and apparatus for treating the surface of a semiconductor and, more particularly, the invention relates to a surface treating method and apparatus for etching the surface of a semiconductor using a plasma.
Hitherto, for treating the surface of a semiconductor, a plasma etcher for etching a semiconductor in a plasma has been used. Conventional techniques will be described by using an etcher, called an ECR (electron cyclotron resonance) etcher, as an example. According to the ECR etcher, a plasma is generated by microwaves within a chamber to which a magnetic field is applied from the outside. The motion of electrons is circular around the magnetic field, and high density plasma is produced by resonance of electron motion and the microwaves. In order to accelerate ions impinging on a sample, such as a semiconductor, a high frequency voltage is applied to the sample. A halogen gas formed from chlorine, fluorine, or the like is used as a plasma gas.
Among conventional etchers of this kind, an etcher for realizing high accuracy during processing is disclosed in Publication of Unexamined Japanese Patent Application (JP-A) No. 6-151360 (corresponding to U.S. Pat. No. 5,352,324). According to this technology, by on-off modulating a high frequency voltage to be applied to the sample, the selectivity between silicon (Si) serving as a substance to be etched and an underlying oxide film can be increased and the aspect ratio dependence can be reduced. JP-A-8-339989 (corresponding to U.S. Pat. No. 5,614,060) discloses a method which can reduce etch residue by overlapping short pulses of a continuous rf bias power in etching performed on a metal. JP-A-62-154734 discloses a method of processing a taper by introducing a gas capable of bringing about deposition and etching and alternately applying a DC bias which is higher than a predetermined potential and a DC bias which is lower than the predetermined potential. JP-A-60-50923 (corresponding to U.S. Pat. No. 4,579,623) discloses a method of improving the surface treating characteristics by periodically varying the amount of etching gas being introduced and also by changing the time of application of the high frequency voltage. Examined Japanese Patent Application Publication No. 4-69415 (corresponding to U.S. Pat. No. 4,808,258) discloses a method of improving the etch characteristic by modulating the high frequency voltage to be applied to a sample. Further, U.S. Pat. No. 4,585,516 discloses a method of improving the uniformity in the etch rate in the plane of a wafer by modulating the high frequency voltage of at least one of high frequency power supplies connected to two electrodes in a triode etcher.
As the integration of a semiconductor becomes finer, the so processing dimension between a line corresponding to a conductive line or an electrode and a space enters a region of 1 &mgr;m or smaller, preferably, 0.5 &mgr;m or smaller. In the processing of such a fine pattern, a problem occurs in that lines gradually become thicker and a pattern cannot be formed according to a design dimension. Further, in addition to an aspect ratio dependent etch rate, an aspect ratio dependent etch profile becomes conspicuous, thereby hindering the processing.
Moreover, the thickness of a gate oxide film of a MOS (metal oxide semiconductor) transistor is equal to or smaller than 6 nm in a 256 Mbit or larger LSI (Large Scale Integration). In such devices, the degree of anisotropy and the selectivity between a material to be etched and the underlying oxide film have the relation of a trade-off, so that the processing is made more difficult.
Many of the conventional techniques were developed when the minimum feature size of a device was 1 &mgr;m or larger. It is becoming difficult to use these techniques to process a device of finer scale. In processing such a fine scale device, it is necessary to set accurate process parameters based on an analysis of the relation between plasma parameters and etch characteristics. At present, many manufactures expend a considerable effort on this determination. By such an organized process, a new device which is qualitatively different also can be processed.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a method and apparatus for treating the surface of a semiconductor, which can process a device whose processing dimension is 1 &mgr;m or smaller, preferably, 0.5 &mgr;m or smaller, so as to respond to the need for producing a finer scale semiconductor.
A feature of the invention relates to a surface treating apparatus comprising: a stage provided in a chamber, on which a sample to be subjected to a surface treatment is placed; etching gas supplying means for continuously supplying an etching gas for plasma generation into the chamber; plasma generating means for generating a high density plasma in the chamber; a bias power supply for applying a bias voltage of 100 kHz or higher frequency to the stage independently of the plasma generation; and a pulse modulating method for modulating the bias power supply with a frequency of 100 HZ to 10 kHz, wherein a surface treatment in which the minimum feature size is 1 &mgr;m or smaller is performed on the sample placed on the stage.
Another feature of the invention relates to a sample surface treating method of applying a radio frequency (rf) bias to the sample and time-modulating the rf bias when a sample, having a gate electrode on SiO
2
serving as an underlying film, whose thickness is 6 nm or smaller, is etched by using a plasma.
Another feature of the invention relates to a method of treating the surface of a sample by continuously supplying an etching gas into a chamber, generating a high density plasma in the chamber, and applying an rf bias voltage to the stage independently of the plasma generation, wherein a surface treatment in which the minimum feature size is 1 &mgr;m or smaller is performed on the sample placed on the stage by using a mixed gas of chlorine and oxygen as the etching gas, and on-off modulating the bias power supply.
According to the invention, in the processing of a fine pattern, an rf voltage to be applied to a sample is on-off modulated, and a combination of the frequency of the rf voltage and the on-off frequency is devised, thereby increasing the degree of anisotropy of etching and also increasing the etch selectivity. Thus, the processing of a device whose processing size is 1 &mgr;m or smaller, preferably, 0.5 &mgr;m or smaller, can be realized. Specifically, by the narrow band of an ion energy distribution, the trade-off between the anisotropy and the selectivity as a problem in processing a fine device is solved.
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Hamasaki Ryouji
Kojima Masayuki
Kure Tokuo
Mizutani Tatsumi
Ono Tetsuo
Hitachi , Ltd.
Olsen Allan
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