Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate
2011-03-22
2011-03-22
Du, Thuan N (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Using delay
C713S400000, C713S501000, C375S360000, C375S362000
Reexamination Certificate
active
07913101
ABSTRACT:
A method includes: delaying an excursion of at least one signal a first number of clock phases when the excursion departs from a value in a first direction; and delaying the excursion of the at least one signal a second number of the clock phases when the excursion departs toward the value in a second direction. The first number of clock phases is different from the second number of clock phases. The at least one signal effects a plurality of succeeding excursions in substantial synchrony with a clocked signal presenting succeeding clock cycles having a plurality of the clock phases in each respective clock cycle.
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Kaul Himanshu
Krishnamurthy Ram K.
Seo Jae-sun
Du Thuan N
Intel Corporation
Schwabe Williamson & Wyatt P.C.
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