Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Patent
1995-11-09
2000-08-29
Banankhah, Majid A.
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
713503, G06F 108
Patent
active
061123072
ABSTRACT:
A synchronizing circuit translates signals in a slow clock domain into a fast clock domain. The frequency of the slow clock is a submultiple of the fast clock frequency. A synchronizing pulse signal is developed at the frequency of the slow clock, but is phase synchronized to the fast clock. The synchronizing pulse signal is employed to gate the signal in the slow clock domain so that it is synchronized in the fast clock domain. In a system where the ratio between the fast clock frequency and slow clock frequency is determined by a frequency divisor signal, a snooping circuit is employed to capture the frequency divisor signal to achieve rapid synchronization between the clock domains.
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Ajanovic Jasmin
Dahmani Dahmane
Holland Kenneth Chris
Khandekar Narendra
Banankhah Majid A.
Intel Corporation
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