Method and apparatus for testing digital circuitry

Details Method and apparatus for testing digital circuitry Method and apparatus for testing digital circuitry

2005-08-09

2005-08-09

Moise, Emmanuel L. (Department: 2136)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S733000, C375S221000, C375S224000, C370S249000

Reexamination Certificate

active

06928597

ABSTRACT:
Digital circuitry is tested through effecting a paired data loop-back from a first buffered output to a first buffered input whilst within the circuitry executing at least part of the test through using a Built-In-Self-Test methodology. In particular, the loop-back is effected from the first buffered data output to a buffered control input, from a buffered control output to the first buffered data input, or both. Advantageously, the buffering is associated to executing a conversion between a digital full swing internal signal and an analog low swing external signal with respect to core circuitry of the digital circuitry.

REFERENCES:
patent: 5787114 (1998-07-01), Ramamurthy et al.
patent: 6348811 (2002-02-01), Haycock et al.
patent: 6493124 (2002-12-01), Haberkorn

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