Method and apparatus for testing a memory interface

Details Method and apparatus for testing a memory interface Method and apparatus for testing a memory interface

2007-10-23

2007-10-23

Ton, David (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S042000

Reexamination Certificate

active

11100031

ABSTRACT:
Methods and apparatuses of debugging and/or testing an interface are disclosed. Briefly, in accordance with one particular embodiment, testing an interface includes detecting a data exchange error in a computing system having an interface. In response to detection of the data exchange error, one or more testing operations are triggered at a subsequent time to the detection of the error.

REFERENCES:
patent: 4745602 (1988-05-01), Morrell
patent: 6381715 (2002-04-01), Bauman et al.
patent: 6961881 (2005-11-01), Yamazaki et al.
patent: 7024603 (2006-04-01), Lin et al.
patent: 7184915 (2007-02-01), Hansquine et al.
patent: 2006/0064561 (2006-03-01), Simeral

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