Method and apparatus for testing a memory device with...

Details Method and apparatus for testing a memory device with... Method and apparatus for testing a memory device with...

2005-12-13

2005-12-13

Lamarre, Guy (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C710S068000, C710S074000, C375S287000, C341S056000

Reexamination Certificate

active

06976195

ABSTRACT:
A method and apparatus for testing a memory device with compressed data using multiple clock edges is disclosed. In one embodiment of the present invention data is written to cells in a memory device, the cells are read to generate read data, the read data is compressed to generate test data, and the test data is produced at a single output on edges of a clock signal.

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