Method and apparatus for synchronous loading and...

Details Method and apparatus for synchronous loading and... Method and apparatus for synchronous loading and...

2007-03-06

2007-03-06

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

Reexamination Certificate

active

10697424

ABSTRACT:
An output of a first data register is coupled to an input of a second data register. The same periodic clock signal clocks both data registers. A controller monitors the clock signal, a first load signal and a read signal. The controller generates a guard band signal using the clock signal and the first load signal. The controller also generates a second guard band signal from the read signal and the clock signal. A second load signal, that is used to load the second data register, is created by performing a logical AND operation on the two guard band signals.

REFERENCES:
patent: 5857005 (1999-01-01), Buckenmaier
patent: 5905766 (1999-05-01), Nguyen
patent: 5918042 (1999-06-01), Furber
patent: 6055285 (2000-04-01), Alston
patent: 6584536 (2003-06-01), Deng
patent: 2003/0009644 (2003-01-01), Fujii

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