Method and apparatus for synchronization of clock domains

Details Method and apparatus for synchronization of clock domains Method and apparatus for synchronization of clock domains

2006-01-17

2006-01-17

Fleming, Fritz (Department: 2182)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

C607S016000

Reexamination Certificate

active

06988215

ABSTRACT:
A method and an apparatus for synchronizing clock domains. A slow clock signal is received. A circuit in a slow clock domain is operated based upon the slow clock signal. A fast clock signal is received. The slow clock signal is synchronized using the fast clock signal. The operation of the circuit is modified from the slow clock domain to the fast clock domain, modifying the operation comprising changing a clock operation frequency during a non-transition period of the slow clock.

REFERENCES:
patent: 5022395 (1991-06-01), Russie
patent: 5099141 (1992-03-01), Utsunomiya
patent: 5254888 (1993-10-01), Lee et al.
patent: 5533032 (1996-07-01), Johnson
patent: 5654988 (1997-08-01), Heyward et al.
patent: 5721886 (1998-02-01), Miller
patent: 6260152 (2001-07-01), Cole et al.
patent: 6799280 (2004-09-01), Edenfield et al.
patent: 2002/0135408 (2002-09-01), Chiu
patent: 0 032 818 (1981-07-01), None
patent: 001113353 (2001-07-01), None

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