Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-08-01
2004-10-19
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S611000
Reexamination Certificate
active
06806147
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the manufacture of semiconductor chips. More specifically, the present invention relates to a method for providing a deep well in the production of CMOS devices.
BACKGROUND OF THE INVENTION
In CMOS fabrication processes, well (or tub) structures are needed to electrically separate n-channel and p-channel MOSFETs. High-energy (MeV) ion implantation is needed to form a deep well with a depth of 800 to 2,000 nm. The projection range R
p
of the high-energy implant is typically 400 to 1,000 nm. For such a high-energy implant, the channeling effect, in which the dopant profile possesses a long tail along certain crystal orientations, is a major problem in well formation. The channeling effect degrades the electrical isolation capability of a well.
For uniform implantation, a common practice involves implanting the dopant with a tilt angle rather than implanting vertically with respect to the silicon wafer (zero-tilt) in order to avoid axial channeling. However, due to present small transistor sizes, the tilt angle can distort the implant symmetry (i.e., the placement of precise doping and concentration). If scanning or batch implantation techniques are also used, this problem will be compounded. Therefore, avoiding axial channeling while using a zero tilt implant is desirable.
BRIEF SUMMARY OF THE INVENTION
Accordingly, the present invention method of fabricating a semiconductor device avoids axial channeling while using a zero tilt implant by forming a buried amorphous layer within the semiconductor substrate, forming a deep well layer below the buried amorphous layer, and then recrystallizing the buried amorphous layer. Advantages of the present invention include, but are not limited to, providing high-energy implants with minimal channeling effect as well as providing high-energy implants with minimal implant symmetry distortion. Other features of the present invention are disclosed or apparent in the section entitled: “DETAILED DESCRIPTION OF THE INVENTION.”
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patent: 5646073 (1997-07-01), Grider et al.
patent: 6143593 (2000-11-01), Augusto
patent: 6245618 (2001-06-01), An et al.
patent: 6459141 (2002-10-01), Yu et al.
Ng Che-Hoo
Yu Bin
Advanced Micro Devices , Inc.
Farjami & Farjami LLP
Nelms David
Vu David
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