Method and apparatus for self-timed precharge of bit lines in a

Static information storage and retrieval – Read/write circuit – Precharge

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36518902, 365210, 36523008, G11C 700

Patent

active

057454213

ABSTRACT:
A method and apparatus are disclosed for self-timing the precharge of bit lines (22) in a memory array. A reference column bit line (26) is charged to create a reference column voltage. The bit lines (22) in the memory array (12) are precharged until the reference voltage exceeds a first threshold.

REFERENCES:
patent: 4943945 (1990-07-01), Lai
patent: 4985864 (1991-01-01), Price
patent: 5349560 (1994-09-01), Suh et al.
patent: 5517454 (1996-05-01), Sato et al.

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