Etching a substrate: processes – Gas phase etching of substrate – Application of energy to the gaseous etchant or to the...
Reexamination Certificate
1999-05-26
2002-05-28
Stinson, Frankie L. (Department: 1746)
Etching a substrate: processes
Gas phase etching of substrate
Application of energy to the gaseous etchant or to the...
C216S072000, C216S079000, C438S708000, C438S738000, C438S743000
Reexamination Certificate
active
06395192
ABSTRACT:
FIELD AND BACKGROUND OF THE INVENTION
The present invention relates to a method and apparatus for selectively removing native oxide layers from silicon wafers without significantly affecting the underlying silicon, or without significantly removing other materials, such as polysilicon or thermal oxide depositions, that may be thereon. Such a process is of substantial importance to the semiconductor industry since the selective removal of native oxide from silicon wafers is among the most frequently performed processes in fabricating silicon semiconductor devices.
Whenever a silicon wafer is exposed to an oxidizing environment, a native oxide layer tends to form on the silicon wafer. Such native oxide layers would deleteriously affect the subsequent processing steps performed on the silicon wafer, and therefore must be cleanly and quickly removed without disturbing other depositions, such as polysilicon or thermal oxide depositions, on the silicon wafer. Generally speaking, a dry cleaning process is more effective and less damaging to the silicon surface than a wet cleaning process.
Narita U.S. Pat. No. 4,985,372 describes a dry cleaning process wherein the silicon wafer surface is exposed to an echant gas including NF
3
and H
2
, or N
2
in place of the H
2
. The process described in that patent requires the generation of a plasma in the chamber at the time the wafer is exposed to the etchant gas.
Another cleaning technique is described in a PhD Thesis by Kevin J. Torek, University of Pennsylvania, May 1996. One described process involves exposing the silicon wafer to NF
3
gas and to ultraviolet radiation while at room temperature (20° C.). According to the data set forth in that Thesis (FIG. 8, page 47), the native oxide was etched at a relatively low rate of between 0.7 A/min (at 80 Torr) to 4 A/min (at 760 Torr) The native oxide removal was selective over depositions on the silicon wafer produced by sputtering, chemical vapor deposition, steam-thermal deposition, and dry-thermal oxide deposition.
This Thesis described another process (FIG. 10, page 50) which included heating the wafer while exposing it to NF
3
in the presence of ultraviolet light and H
2
O. However, such a process involves completely different chemistry since the addition of H
2
O causes the formation of HF and completely changes the reaction rates and selectivities.
OBJECTS AND BRIEF SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for selectively removing a native oxide layer from a silicon wafer having advantages over the above-described methods known in the prior art. Another object of the invention is to provide apparatus for removing native oxide layers in accordance with the novel method.
According to one aspect of the present invention, there is provided a method of selectively removing a native oxide layer from a silicon wafer without significantly affecting the underlying silicon or other materials that may be there on, comprising exposing the silicon wafer to an etchant gas including NF
3
while simultaneously exposing the wafer to ultraviolet radiation and heating the wafer to a temperature of 100-400° C.
Preferably, the process should be performed at a temperature of 250-350° C., particularly good results having been obtained at a temperature of about 300° C. As will be described more particularly below, it has been found that elevating the process temperature as described above substantially increases the removal rate of the native oxide without losing the selectivity achieved at room temperature until the higher end of above-described temperature range is reached At higher temperatures, the native oxide removal rate may increase further, but it was found that selectivity is lost.
According to further features in the preferred embodiment of the invention described below, the etchant gas also includes N
2
The example described below includes N
2
in approximately equal proportions by volume as the NF
3
.
According to still further features in the described preferred embodiment, the partial pressure of the etchant gas is preferably within the moderate pressure range, of 10-300 Torr. The higher partial pressures, would be expected to produce faster reaction rates, but would result in a number of disadvantages. Thus, higher pressures in the reactor increase the danger of leakage of NF
3
from the reactor to the atmosphere, which can cause a serious health problem since NF
3
is highly toxic. In addition, a high pressure in the reactor increases the danger of particles depositing on the silicon wafer being treated which will cause problems in subsequent processing of the wafer. Further, a higher pressure in the reactor increases the wafer processing time in single-wafer processing apparatus, since the NF
3
must be completely removed from the chamber prior to transferring the wafer to the next process module. Thus, a low process pressure saves time by requiring less pump down time at the end of the process, and less time for pressure and flow stabilization at the beginning of the process.
Preferably, therefore, the pressure should be below 100 Torr, optimally about 30-60 Torr. In the example described below, the partial pressure of the NF
3
was 30 Torr and the partial pressure of the N
2
was 30 Torr.
According to another aspect of the present invention, there is provided apparatus for removing a native oxide layer from a silicon wafer without significantly affecting the underlying silicon or other materials that may be there on, comprising a heating chamber including a supporting member for supporting the wafer from which the native oxide layer is to be selectively removed; a heater for heating a wafer on the supportive member to a temperature of 100-400° C.; a gas supply for introducing into the chamber an etchant gas including NF
3
; and an ultraviolet source for irradiating the wafer with ultraviolet radiation while the wafer is exposed to the etchant gas and is heated to the temperature of 100-400° C.
Further features and advantages of the invention will be apparent from the description below
REFERENCES:
patent: 4985372 (1991-01-01), Narita
patent: 5022961 (1991-06-01), Izumi et al.
patent: 5228206 (1993-07-01), Grant et al.
patent: 5439553 (1995-08-01), Grant et al.
patent: 5578133 (1996-11-01), Sugino et al.
patent: 6165273 (2000-12-01), Fayfield et al.
K. Torek, PhD Thesis, Penn State University, 1996, Chapter 5.
Brosilow Benjamin
Nemirovsky Yael
Stolyarova Sara
Connolly Bove & Lodge & Hutz LLP
Olsen Allan
Steag C.V.D. Systems Ltd.
Stinson Frankie L.
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