Method and apparatus for programmable sampling clock edge...

Details Method and apparatus for programmable sampling clock edge... Method and apparatus for programmable sampling clock edge...

2007-09-25

2007-09-25

Elamin, A. (Department: 2116)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

C713S401000, C713S500000, C713S501000, C713S502000, C713S503000, C713S600000, C713S601000

Reexamination Certificate

active

10443297

ABSTRACT:
A method and apparatus for transferring data across a clock domain boundary is described. In one embodiment, a fixed relationship between a faster clock and a slower clock is maintained in the process of phase alignment to allow great flexibility in allowable combinations of slower clock and faster clock frequencies. In one embodiment, an encoded edge select word is generated once at system initialization and used thereafter to select edges of the faster clock on which to sample data that comes from the clock domain of the slower clock. The value of the encoded edge select word is based, in part, on the fixed relationship between the faster clock and the slower clock.

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