Method and apparatus for producing a packaged integrated...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Reexamination Certificate

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07020858

ABSTRACT:
A method of producing a wirebond ball grid array package is described. The method comprises the steps of importing a master pinlist to a computer program, importing a bonding diagram to the computer program, and verifying, by the computer program, substrate artwork against the master pinlist and the bonding diagram. A method of producing a wirebond ball grid array package according to an alternative embodiment comprises the steps of importing a master pinlist to a computer program, importing substrate artwork to the computer program, and verifying, by the computer program, a bonding diagram against the master pinlist and the substrate artwork. Finally, a system for verifying substrate artwork comprises means for importing a master pinlist to a computer program, means for importing a bonding diagram to the computer program, and means for verifying, by the computer program, the substrate artwork against the master pinlist and the bonding diagram.

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patent: 6569094 (2003-05-01), Suzuki et al.
patent: 6581189 (2003-06-01), Tain
patent: 6665853 (2003-12-01), LeCoz
Prolinx Labs Corporation, ViperBGA Designer 2.0 ViperBGA Specifier 2.0 User's Guide, Copyright 1996, 1997, 1998, ProLinx Labs Corporation, San Jose.

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