Method and apparatus for processing an event occurrence for...

Electrical computers and digital processing systems: processing – Processing control – Branching

Reexamination Certificate

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Reexamination Certificate

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07039794

ABSTRACT:
A method includes detecting a first pending event related a first thread being processed within a multithreaded processor. Responsive to the detection of the first pending event, a second thread being processed within the multithreaded processor is monitored to detect an event handling point for the second thread. Responsive to the detection of the event handling point for the second thread, at least a first event handler is invoked to handle at least the first pending event.

REFERENCES:
patent: 3771138 (1973-11-01), Celtruda et al.
patent: 5357617 (1994-10-01), Davis et al.
patent: 5361337 (1994-11-01), Okin
patent: 5386561 (1995-01-01), Huynh et al.
patent: 5392437 (1995-02-01), Matter et al.
patent: 5404469 (1995-04-01), Chung et al.
patent: 5430850 (1995-07-01), Papadopoulos et al.
patent: 5499349 (1996-03-01), Nikhil et al.
patent: 5524263 (1996-06-01), Griffth et al.
patent: 5586332 (1996-12-01), Jain et al.
patent: 5630130 (1997-05-01), Perotto et al.
patent: 5761522 (1998-06-01), Hisanaga et al.
patent: 5787297 (1998-07-01), Lin
patent: 5809271 (1998-09-01), Colwell et al.
patent: 5809522 (1998-09-01), Novak et al.
patent: 5892959 (1999-04-01), Fung
patent: 5968160 (1999-10-01), Saito et al.
patent: 5983339 (1999-11-01), Klim
patent: 5996085 (1999-11-01), Cheong et al.
patent: 6052708 (2000-04-01), Flynn et al.
patent: 6088788 (2000-07-01), Borkenhagen et al.
patent: 6092175 (2000-07-01), Levy et al.
patent: 6105127 (2000-08-01), Kimura et al.
patent: 6212544 (2001-04-01), Borkenhagen et al.
patent: 6256755 (2001-07-01), Flynn
patent: 6496925 (2002-12-01), Robers et al.
patent: 0 346 003 (1989-12-01), None
patent: 0 352 935 (1990-01-01), None
patent: 0 725 335 (1996-08-01), None
patent: 0 747 816 (1996-12-01), None
patent: 0747816 (1996-12-01), None
patent: 0 768 608 (1997-04-01), None
patent: 0 768 608 (1997-04-01), None
patent: 0 856 797 (1998-05-01), None
patent: 08 64960 (1998-09-01), None
patent: 0 827 071 (1999-03-01), None
patent: 0 962 856 (1999-12-01), None
patent: 2311880 (1997-10-01), None
patent: WO 99/21082 (1999-04-01), None
patent: WO 99/21088 (1999-04-01), None
“Architectural and Implementation Tradeoffs in the Design of Multiple-Context Processors”; James Laudon et al. Multithreaded Computer Architecture: A Summary of the State of the Art; Ch. 8, pp. 167-200; 1994.
“Evaluation of Multithreaded Uniprocessors for Commercial Application Environments”; Richard J. Eickemeyer et al.; Proceedings of the 23rd Int. Symposium on Computer Architecture; 1996; pp. 203-212.
International Searching Authority; “International Search Report”; PCT/US00/28421; Feb. 2, 2001.
Farrens, MK; Pleszkun, AR; “Strategies for Achieving Improved Processor Throughput”; The 18th Annual Int. Sym. on Computer Architecture, 1991; pp. 362-369.
Mendelson, A; Bekerman, M.; “Design Alternatives of Multithreaded Architecture”; International Journal of Parallel Programming, Dec. 9, 1996; vol. 27, No. 3, pp. 161-193.
Dean M. Tullsen, et al.; “Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor”; Dept. of Computer Science and Eng., Univ. of WA, Seattle, WA (no date given).
Roa P. Pokala, et al.; “Physical Synthesis for Performance Optimization”; Vertex Semiconductor; pp. 291-300; San Jose CA, (no date given).
Gregory T. Byrd, et al; “Multithreaded Processor Architectures”; Western Carolina Univ., 8045 IEEE Spectrum, 32(1995) Aug. No. 8, New York, US; (no date given).
Mark R. Thistel, et al.; “A Processor Architecture for Horizon”; Institute for Defense Analyses, Super computing Research Center, Lanham, Maryland 20706; 1998.
Ruediger R. Asche; “Multithreading for Rookies”; Microsoft Developer Network Technology Group; pp1-15; (no date given).
Dongwook E, et al; “A Partitioned On-Chip Virtual Cache for Fast Processors”; Journal of Systems Architecture Elservier Science Publishers BV.; Amsterdam, NL; vol. 43, No. 8; 1997; pp. 519-531, XP000685730.
Simon W. Moore; “Multithreaded Processor Design”; Kluwer Academic Pub. 1996.
Dennis Lee, Jean-Loup Baer, Brad Calder, Dirk Grunwald; “Instruction Cache Fetch Policies for Speculative Execution”; 22nd Intentional Symposium on Computer Architecture; Jun. 1995.
Peter Song; “Multithreading Comes of Age”; Microdesign Resources, Jul. 14, 1997; pp. 13-18.
Steere D., et al.; “A Feedback-Driven Proportion Allocator for Real-Rate Scheduling”; Third Symposium on Operating Systems Design and Implementations; Feb. 22-25, 1999; pp. 145-158; XP002153159.
INTEL; “P6 Family of Processors”, Hardware Developer's Manual; Sep. 1998, XP-002153160.
IBM; “Improves Dispatching in a Rendering Context Manager”; IBM Technical Disclosure Bulletin; Dec. 1990; pp. 131-134, vol. 33, No. 7, XP000108363 ISSN: 0018-8689, Armonk, NY.
Manu Gulati, Nader Bagherzadeh; “Performance Study of a Multithreaded Superscalar Microprocessor”; Proceedings 2nd Int. Sym. high-performance Computer Arch.; Feb. 3-7, 1997; pp. 291-301.
R. Guru Prasadh; Chuan-Lin Wu; “A Benchmark Evaluation of a Multithreaded RISC Processor Architecture”; 1991 International Conference on Parallel Processing; pp. I84-I91.

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