Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2011-04-26
2011-04-26
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S726000, C714S727000, C714S729000, C714S734000
Reexamination Certificate
active
07934134
ABSTRACT:
A method for performing a logical built-in self-test of an integrated circuit is disclosed. The method includes performing a flush and scan test to determine whether the scan chains function correctly. If one of the scan chains does not function correctly, the logical built-in self-test is terminated. If each of the scan chains functions correctly, a structural test of the design-for-test logic supporting LBIST is performed to determine whether the LBIST design-for-test logic functions correctly. If the LBIST design-for-test logic does not function correctly, the logical built-in self-test is terminated. If the LBIST design-for-test logic functions correctly, a level sensitive scan design test of the functional combinational logic is performed using the logic supporting LBIST design-for-test to determine if the integrated circuit functions correctly.
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Nandu Tendolkar1, Dawit Belete1, Bill Schwarz1, Bob Podnar1, Akshay Gupta3, Steve Karako1, Wu-Tung Cheng2, Alex Babin2, Kun-Han Tsai2, Nagesh Tamarapalli2, Greg Aldrich2 Improving Transition Fault Test Pattern Quality through At-Speed Diagnosis, 2006.
Forlenza Donato O.
Forlenza Orazio P.
Robbins Bryan J.
Tran Phong T.
Britt Cynthia
Dillon & Yudell LLP
International Business Machines - Corporation
Merant Guerrier
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