Method and apparatus for out of order memory scheduling

Details Method and apparatus for out of order memory scheduling Method and apparatus for out of order memory scheduling

2006-10-24

2006-10-24

Bataille, Pierre (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S167000

Reexamination Certificate

active

07127574

ABSTRACT:
Embodiments of the present invention provide an algorithm for scheduling read and write transactions to memory out of order to improve command and data bus utilization and gain performance over a range of workloads. In particular, memory transactions are sorted into queues so that they do not have page conflict with each other and are scheduled from these queues out of order in accordance with read and write scheduling algorithms to optimize latency.

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