4. Electrical computers and digital data processing systems: input/
  5. Intrasystem connection
  6. Bus interface architecture

Nagi Aboulenein

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Method and apparatus for memory access scheduling to reduce...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate

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Method and apparatus for out of order memory scheduling

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate

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Prefetching data for peripheral component interconnect devices

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2734989

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