Method and apparatus for multiple sequence access to single...

Details Method and apparatus for multiple sequence access to single... Method and apparatus for multiple sequence access to single...

2008-09-02

2008-09-02

Kim, Matt (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S168000, C710S052000, C710S112000

Reexamination Certificate

active

10330995

ABSTRACT:
Bus address, function and system information in relation to bus requests are maintained in a centralized location (702). Parallel access to the centralized data is facilitated through the use of pointers to the centralized location. Bus transaction operations needing access to the centralized data are simultaneously connected to the data through the use of the pointer control (610), rather than requiring the data to be sequentially transmitted to the bus transaction operations as required.

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Hennessy et al., “Computer Architecture A Quantitative Approach,” Morgan Hauffmann Publishers, Inc., 1990, pp. 654-662.

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