Method and apparatus for memory with embedded processor

Details Method and apparatus for memory with embedded processor Method and apparatus for memory with embedded processor

2005-04-05

2005-04-05

Peikari, B. James (Department: 2186)

Electrical computers and digital data processing systems: input/

Input/output data processing

Concurrent input/output processing and data transfer

C711S173000

Reexamination Certificate

active

06877046

ABSTRACT:
In one form, a computer system includes a system processor operable to process data. The system includes a number of memory array chips coupled to the system processor by a system bus. Such a memory array chip includes random access memory partitioned into rows, each row having a number of memory words. The random access memory has an internal buffer and the buffer is operable to hold a plurality of the memory words. Such a memory array chip includes an embedded processor and an internal bus coupling the embedded processor to the internal buffer. The internal bus is capable of concurrently transferring the plurality of memory words of the internal buffer for processing by the embedded processor.

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