Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Patent
1991-10-11
1992-12-01
Jackson, Jr., Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
257778, H01L 3902, H01L 2302, H01L 2312
Patent
active
051683466
ABSTRACT:
A preformed planar structure is interposed between the chip(s) and the substrate in a flip-chip structure, and establishes a minimum gap between the chip(s) and the substrate. Liquid flux may be applied to the preformed planar structure in order that flux is selectively applied to the solder balls (pads) on the chip and the substrate. The preformed planar structure may be provided with through holes in registration with the solder balls on the chip(s) and the substrate. In this case, liquid flux selectively fills the through holes for delivery to the solder balls during soldering. The through holes also aid in maintaining registration of the chip(s) and the substrate. The through holes may be sized to establish a predetermined mechanical structure of solder joints formed by the solder balls when fused together. The preformed planar structure has a planar core and opposing planar faces. The core is formed of thermosetting organic resin, such as polyimide, or non-organic material such as alumina, polished sapphire, beryllium oxide, aluminum nitride or aluminum. The planar faces of the preformed planar structure are formed of thermoplastic resin or thermosetting material, such as polyacetal, expoxide resin or polystyrene. The preformed planar structure tends to draw the chip(s) together to the substrate, establishing a flip-chip structure of mechanical integrity. The preformed planar structure has a thickness of 5-50 microns, preferably on the order of 20-30 microns. Method and apparatus are disclosed.
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Dell'Oca Conrad J.
Pasch Nicholas F.
Sahakian Vahak K.
Jackson, Jr. Jerome
Linden Gerald E.
LSI Logic Corporation
Monin D.
Rostoker Michael D.
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